MikeJ has been busy. See here:- http://www.fpgaarcade.com/ Fantastic! He has indicated plans to support many other platforms. Maybe Atari ST is not welcomed...
Hi Mark, et al. ... aren't ... believe ... constraints ... The SDRAM controller files for v12d and v12e have one difference. The SDRAM controller file for V13...
... AFAIK there are two issues with (DE1) Minimig atm... (1) SDRAM timing. Some DE1 boards use different SDRAM chips which aren't compatible with the Minimig...
first of all if I bothered with my posts I am sorry, the point i am able to send sof file via jtag or pof file with programing mode. de 1 board shows regular...
... You'll find people are going to be more willing (and able!) to help if you actually bothered to describe _what_ errors you're getting and the steps you ...
type of de1 board does not match with the compiled sof file, minimig13_de1_quartus81 device is EP2C20F484 when I check my device, it says EP2C15/20 so the file...
Hi Mark, I'm glad that you work with the TG68 Core and that the bug was a false alarm. Regards, TobiFlex ... yourself ... much full ... after a ... _was_...
... It may seem that way, but since I've been working on it pretty much full time for the last 24 hours, I did actually get to the point where, after a few...
You seem to be crying wolf a lot, why not keep your errors to yourself untill you are !00% sure ________________________________ From: Mark McDougall...
Hi Tobias, 2) I *think* I've found an execution bug. move.w #$1234, d0 move.l #$0810, a0 move.w d0,(a0) ...works correctly. It writes $1234 to address $0810....
Hi Tobias, OK, I've started a new thread because I think I know a little more about what is going on. I still reserve the right to a big "DOH" if you point out...
... OK, my fault for not understanding the 68k timing (haven't done a 68k design myself). I see that a standard 68000 bus cycle is 4 MPUCLKs long... Is it true...
Hi Tobias, I'm attempting to instantiate your TG68 core in a project of mine and am having trouble getting it to behave as I expect. I've got a small internal...
Sergio and Phil, ... I also have successfully rebuilt the POF/SOF using Quartus 8.1 Web Edition (it's free) and have a DE2 board with the new PSC SDRAM chips. ...
... files and ... the ... (as in, from ... failed with a ... (or garbage ... programmed it ... the demo ADF ... yet, so I ... warnings, and a ... looking into,...
... That's odd. All I did was downloaded the V1.3 source code, opened the "minimig_DE1" project with Quartus 8.1 Web Edition, then double-clicked Compile...
I am somewhat confused by this. According to the datasheet, the IS42S8800 is organized as 2Mx8x4, whereas the PSC chip is 1Mx16x4.. ... cames with the news DE1...
... files and ... the ... (as in, from ... failed with a ... (or garbage ... programmed it ... the demo ADF ... yet, so I ... warnings, and a ... looking into,...
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