Mark McDougall wrote:

> move.l #$0810, a0
> move.w #$1234, d0
> move.w d0,(a0)
>
> ...doesn't work. It outputs #$1234 on *both* address and data_out buses!

***SIGH***

Sorry Tobias, a false alarm. Should've checked the timing report!!!!

All looks OK...

Regards,

--
|              Mark McDougall                | "Electrical Engineers do it
|  <http://members.iinet.net.au/~msmcdoug>   |   with less resistance!"

Hi Tobias,

2) I *think* I've found an execution bug.

move.w #$1234, d0
move.l #$0810, a0
move.w d0,(a0)

...works correctly. It writes $1234 to address $0810. However...

move.l #$0810, a0
move.w #$1234, d0
move.w d0,(a0)

...doesn't work. It outputs #$1234 on *both* address and data_out buses!

Regards,

--
|              Mark McDougall                | "Electrical Engineers do it
|  <http://members.iinet.net.au/~msmcdoug>   |   with less resistance!"

Hi Tobias,

OK, I've started a new thread because I think I know a little more about
what is going on. I still reserve the right to a big "DOH" if you point out
something stupid that I've done!! ;)

I should mention that I assert DTACKn immediately after AS# is asserted.

1) The core is changing address whilst AS# is asserted. From what I can
tell, this is a big no-no. It's a problem on writes as you can imagine. I
also appears to be holding AS# for quite a long time - longer than I would
think necessary. My temp fix was to strobe my RAM-write on the leading-edge
cycle of AS# asserted.

2) I *think* I've found an execution bug.

move.w #$1234, d0
move.l #$0810, a0

...works correctly. It writes $1234 to address $0810. However...

move.l #$0810, a0
move.w #$1234, d0

...doesn't work. It outputs #$1234 on *both* address and data_out buses!

I can provide you with signaltap traces if you like.

BTW TG68.vhd v1.01, TG68_fast.vhd v1.04 as from Minimig v13 disto.

Regards,

--
|              Mark McDougall                | "Electrical Engineers do it
|  <http://members.iinet.net.au/~msmcdoug>   |   with less resistance!"

Mark McDougall wrote:

> OK, my fault for not understanding the 68k timing (haven't done a 68k design
> myself).
> I see that a standard 68000 bus cycle is 4 MPUCLKs long...

My last post was utter trollop.

I'm afraid I don't understand how the TG68 core is supposed to work... :(

Regards,

--
|              Mark McDougall                | "Electrical Engineers do it
|  <http://members.iinet.net.au/~msmcdoug>   |   with less resistance!"

Mark McDougall wrote:

> Not sure what I don't understand here?!? I tried DTACK# tied low, then tried
> setting DTACK# to AS# in a clocked process. Am I asserting DTACK# too early
> here??? Otherwise, I don't really know how I'm supposed to use the TG68
> core... :(

OK, my fault for not understanding the 68k timing (haven't done a 68k design
myself).

I see that a standard 68000 bus cycle is 4 MPUCLKs long...

Is it true that to run the TG68 core at 12MHz I need a 24MHz clock_ena?

Regards,

--
|              Mark McDougall                | "Electrical Engineers do it
|  <http://members.iinet.net.au/~msmcdoug>   |   with less resistance!"

Hi Tobias,

I'm attempting to instantiate your TG68 core in a project of mine and am
having trouble getting it to behave as I expect.

I've got a small internal RAM and have written a small test bootstrap ROM
for it. It reads the stack and reset vectors, jumps to the start and appears
to execute the code OK.

BUT...

(1) AS# and RW# are asserted during a memory write instruction, but not
de-asserted before the next instruction fetch starts. So the next
instruction is overwritten while being fetched... I did a quick fix by
pulsing the memory write on leading edge of AS# & RW#...

(2) The memory write drives the correct address and then asserts AS# and
RW#, but the write data doesn't appear on the data (out) bus until approx 10
cycles have elapsed!!! In that time it has fetched and executed a number of
BRA instructions!!!

Not sure what I don't understand here?!? I tried DTACK# tied low, then tried
setting DTACK# to AS# in a clocked process. Am I asserting DTACK# too early
here??? Otherwise, I don't really know how I'm supposed to use the TG68
core... :(

Regards,

--
|              Mark McDougall                | "Electrical Engineers do it
|  <http://members.iinet.net.au/~msmcdoug>   |   with less resistance!"

--- In minimigtg68@yahoogroups.com, Alex Perez <aperez@...> wrote:

> I also have successfully rebuilt the POF/SOF using Quartus 8.1 Web
> Edition (it's free) and have a DE2 board with the new PSC SDRAM
chips.
> This has taken care of all issues I've had with regards to stability.
>

Is possible to upload your pof file in files?
i havnt now 8.1 version :(

Sergio and Phil,

On Oct 31, 2008, at 7:03 AM, sergio_stunt wrote:

> --- In minimigtg68@yahoogroups.com, Philip Pemberton <ygroups@...>
> wrote:
> >
> > Hi guys,
> > It seems there's a compatibility issue between the DE1 bitstream
> files and
> > the new-rev DE1 hardware with the PSC SDRAM chips.
> > Basically, I used the precompiled microcode (POF/SOF) files on the
> > filebase. V1.2e booted Kickstart, but kept sporadically rebooting
> >(as in, from  "loading SPIBOOT.ROM"). V1.3 wouldn't even load --
> typically it
> >failed with a
> > solid colour screen and the blue OSD visible, but with no OSD text
> > (or garbage instead of text).
> >
> > I rebuilt V1.3 with the latest Quartus (V8.1 Web Edition) and
> programmed it
> > into my DE1, and it booted fine. Kickstart is up and running, and
> the demo ADF
> > loads OK. Unfortunately I don't have the microphone mod sorted out
> yet, so I
> > can't get Protracker to play any sound, but at least it boots...
> > Last point -- Quartus throws out a lot of timing analysis
> warnings, and a
> > couple relating to the SPI bootROM. These are probably worth
> looking into, but
> > I'm almost certainly not the best person for the job, given that
> I've only
> > been using Quartus for a few days... I did use Xilinx ISE in
> Verilog HDL mode
> > for a good year or two, so maybe that'll help a little :)
> >
> > Thanks,
> > --
> > Phil.
> > ygroups@...
> > http://www.philpem.me.uk/
> >
> what about rebuild all for DE2?
> cos cant use minimig properly at this board due sdram crash issue.
>
I also have successfully rebuilt the POF/SOF using Quartus 8.1 Web
Edition (it's free) and have a DE2 board with the new PSC SDRAM chips.
This has taken care of all issues I've had with regards to stability.

--- In minimigtg68@yahoogroups.com, Philip Pemberton <ygroups@...>
wrote:
>
> Hi guys,
>    It seems there's a compatibility issue between the DE1 bitstream
files and
> the new-rev DE1 hardware with the PSC SDRAM chips.
>
>    Basically, I used the precompiled microcode (POF/SOF) files on
the
> filebase. V1.2e booted Kickstart, but kept sporadically rebooting
(as in, from
> "loading SPIBOOT.ROM"). V1.3 wouldn't even load -- typically it
failed with a
> solid colour screen and the blue OSD visible, but with no OSD text
(or garbage
> instead of text).
>
>    I rebuilt V1.3 with the latest Quartus (V8.1 Web Edition) and
programmed it
> into my DE1, and it booted fine. Kickstart is up and running, and
the demo ADF
> loads OK. Unfortunately I don't have the microphone mod sorted out
yet, so I
> can't get Protracker to play any sound, but at least it boots...
>
>    Last point -- Quartus throws out a lot of timing analysis
warnings, and a
> couple relating to the SPI bootROM. These are probably worth
looking into, but
> I'm almost certainly not the best person for the job, given that
I've only
> been using Quartus for a few days... I did use Xilinx ISE in
Verilog HDL mode
> for a good year or two, so maybe that'll help a little :)
>
> Thanks,
> --
> Phil.
> ygroups@...
> http://www.philpem.me.uk/
>
what about rebuild all for DE2?
cos cant use minimig properly at this board due sdram crash issue.

@philip, I did everything you said still nothing happend,:(

ozkanocakli wrote:
> I tried every combination but no sucess,

That's odd. All I did was downloaded the V1.3 source code, opened the
"minimig_DE1" project with Quartus 8.1 Web Edition, then double-clicked
Compile Design. It does take a long while to compile though...

I've put the POF and SOF files I used in the Filebase on the group's homepage.

Remember: All switches OFF except 9, 3, 2, 1, 0 (which should be ON). Toggle
SW0 to reset Minimig. You need an SD card or Multimedia Card with KICK.ROM,
SPIHOST.ROM and a Workbench disk (ADF file) in the SD card slot. FAT16 format,
folks.

The DE1's mode switch should be set to "RUN", *not* "PROG". Let it run the
Demo code, then reload the FPGA using the Quartus programmer app. It'll start
booting Minimig (you'll see the hex displays change into a track/head counter).

I suspect Minimig/tg68 is sending something to the serial port as well,
because I saw the TXD LED light. No idea what it's sending though, debug info
perhaps?

--
Phil.
ygroups@...
http://www.philpem.me.uk/

I am somewhat confused by this. According to the datasheet, the
IS42S8800 is organized as 2Mx8x4, whereas the PSC chip is 1Mx16x4..

--- In minimigtg68@yahoogroups.com, "Javier Ruiz" <soyandroid@...> wrote:
>
> Dear Mark
>
> Now, i now for sure that the problem is in the SDRAM memory that
cames with the news DE1 and DE2 boards.
>
> In the old boards they mounted the IS42S8800 from ISI.
>
> In the new boards they are mounting the A2V64S40CTP from PSC (Power
Chip Semiconductors)
>
> Now i have two DE1 boards, one with the old IS42S8800 SDRAM that run
with all the versions of Minimig and never crashes and one new DE1
with the SDRAM from PSC, this board only runs the precompiled versions 12.
>
> With Quartus 8.0 SP1, i succesfully syntetized the version 13 for
this new DE1 board, it runs, but hangs very often by problems of
memory corruption.
>
> Best Regards
> Xavier Ruiz
>
>
>   ----- Original Message -----
>   From: Mark McDougall
>   To: minimigtg68@yahoogroups.com
>   Sent: Wednesday, September 24, 2008 8:52 AM
>   Subject: [minimigtg68] DE2 & V13
>
>
>   Hi all,
>
>   Been having some problems with v13 and thought I'd see if anyone
else has
>   had the same experience as me!?!
>
>   1st of all, I've downloaded the new v13 source and have built a
project for
>   my own hardware, which has an EP2C35. I've copied the new
spihost.rom to my
>   SD card and can boot Minimig and subsequent ADF images from the SD
card no
>   problems.
>
>   However, if I program a DE2 with the pre-compiled .SOF file from
v13 and use
>   the same SD card as above, I get nothing. Nothing at all! No video
sync, no
>   LED light on reset - absolutely dead.
>
>   Ditto if I compile the DE2 project from the v13 sources.
>
>   Now, I have an old project from when I ported the DE1 port to the
DE2,
>   before Tobias released a DE2 project. I replaced the top-level
schematics in
>   this design with VHDL equivalents and a DE2 wrapper around the DE1
>   top-level. If I build this project - I get video sync and the OSD
which says
>   that SPIHOST is found and booting. However, it never finishes
booting and
>   often displays the OSD again - looping ad-infinitum. If I try
resetting the
>   board with SW0, I get various results such as green screen, yellow
screen,
>   grey screen, black screen - with and without the OSD message.
>
>   Time to look at timing methinks...
>
>   Regards,
>
>   --
>   | Mark McDougall | "Electrical Engineers do it
>   | <http://members.iinet.net.au/~msmcdoug> | with less resistance!"
>

I tried every combination but no sucess,

--- In minimigtg68@yahoogroups.com, Philip Pemberton <ygroups@...>
wrote:
>
> Hi guys,
>    It seems there's a compatibility issue between the DE1 bitstream
files and
> the new-rev DE1 hardware with the PSC SDRAM chips.
>
>    Basically, I used the precompiled microcode (POF/SOF) files on
the
> filebase. V1.2e booted Kickstart, but kept sporadically rebooting
(as in, from
> "loading SPIBOOT.ROM"). V1.3 wouldn't even load -- typically it
failed with a
> solid colour screen and the blue OSD visible, but with no OSD text
(or garbage
> instead of text).
>
>    I rebuilt V1.3 with the latest Quartus (V8.1 Web Edition) and
programmed it
> into my DE1, and it booted fine. Kickstart is up and running, and
the demo ADF
> loads OK. Unfortunately I don't have the microphone mod sorted out
yet, so I
> can't get Protracker to play any sound, but at least it boots...
>
>    Last point -- Quartus throws out a lot of timing analysis
warnings, and a
> couple relating to the SPI bootROM. These are probably worth
looking into, but
> I'm almost certainly not the best person for the job, given that
I've only
> been using Quartus for a few days... I did use Xilinx ISE in
Verilog HDL mode
> for a good year or two, so maybe that'll help a little :)
>
> Thanks,
> --
> Phil.
> ygroups@...
> http://www.philpem.me.uk/
>
http://whoyouvotefor.info/altera_sdram.html
here is info about sdram controller for new chip
i havnt time too look by myself but maybe usefull for someone.
regards.

http://whoyouvotefor.info/altera_sdram.html
here is info about sdram controller for new chip
i havnt time too look by myself but maybe usefull for someone.
regards.

hi Philip, could you please upload new sof & pof files for de1

Philip Pemberton wrote:
> loads OK. Unfortunately I don't have the microphone mod sorted out yet, so I
> can't get Protracker to play any sound, but at least it boots...

Ugh, that should be *mouse* mod, not microphone.
Another reason I shouldn't send emails at eight minutes to one in the morning.

It has not been a good day.

--
Phil.
ygroups@...
http://www.philpem.me.uk/

Hi guys,
    It seems there's a compatibility issue between the DE1 bitstream files and
the new-rev DE1 hardware with the PSC SDRAM chips.

    Basically, I used the precompiled microcode (POF/SOF) files on the
filebase. V1.2e booted Kickstart, but kept sporadically rebooting (as in, from
"loading SPIBOOT.ROM"). V1.3 wouldn't even load -- typically it failed with a
solid colour screen and the blue OSD visible, but with no OSD text (or garbage
instead of text).

    I rebuilt V1.3 with the latest Quartus (V8.1 Web Edition) and programmed it
into my DE1, and it booted fine. Kickstart is up and running, and the demo ADF
loads OK. Unfortunately I don't have the microphone mod sorted out yet, so I
can't get Protracker to play any sound, but at least it boots...

    Last point -- Quartus throws out a lot of timing analysis warnings, and a
couple relating to the SPI bootROM. These are probably worth looking into, but
I'm almost certainly not the best person for the job, given that I've only
been using Quartus for a few days... I did use Xilinx ISE in Verilog HDL mode
for a good year or two, so maybe that'll help a little :)

Thanks,
--
Phil.
ygroups@...
http://www.philpem.me.uk/

--- In minimigtg68@yahoogroups.com, "ozkanocakli" <ozkanocakli@...>
wrote:
>
> hi all, yesterday I bought de1, when I try to program minimig de1
with
> 1.2 it says spı found and loading kick.rom after red scren appear on
> screen
>
> when I tried 1.3 nothing happens,
>
> best regards
>


I will demonstrate it our retro meeting in istanbul so, please help
me :)

hi all, yesterday I bought de1, when I try to program minimig de1 with
1.2 it says spı found and loading kick.rom after red scren appear on
screen

when I tried 1.3 nothing happens,

best regards

Javier Ruiz wrote:

> In the new boards they are mounting the A2V64S40CTP from PSC (Power Chip
> Semiconductors)
>
> Now i have two DE1 boards, one with the old IS42S8800 SDRAM that run with
> all the versions of Minimig and never crashes and one new DE1 with the
> SDRAM from PSC, this board only runs the precompiled versions 12.

Interesting. I've just run the pre-compiled v13 build on my DE1 with the PSC
SDRAM chip and it appears to run fine without crashing.

I guess it's luck of the draw until the SDRAM routing/pin constraints have
been worked out.

Hopefully I'll get to look at them soon...

Regards,

--
|              Mark McDougall                | "Electrical Engineers do it
|  <http://members.iinet.net.au/~msmcdoug>   |   with less resistance!"

TobiFlex wrote:

> Please remove the rem markers in line 168 and 171 from the File
> \Board\TG68.vhd
> correct Code:
> line 168: IF wr='1' THEN
> line 169:     uds_s <= uds_in;
> line 170:     lds_s <= lds_in;
> line 171: END IF;
>
> I hope this resolve the Problem.

Still no good Tobias. It finds the SD card and loads SPIHOST but hangs on
the grey screen.

I think you'll find that you need timing constraints and accurate clock skew
to get this design to work reliably. Running the SDRAM at 114MHz is going to
require some constraints to be met on the SDRAM I/O...

Regards,

--
|              Mark McDougall                | "Electrical Engineers do it
|  <http://members.iinet.net.au/~msmcdoug>   |   with less resistance!"

Hi Mark

Please remove the rem markers in line 168 and 171 from the File
\Board\TG68.vhd
correct Code:
line 168: IF wr='1' THEN
line 169:     uds_s <= uds_in;
line 170:     lds_s <= lds_in;
line 171: END IF;

I hope this resolve the Problem.
Viele Grüße
TobiFlex

> Mark McDougall wrote:
>
> > I've added constraints to the SDRAM pins and now I can boot
Hybris on the
> > DE2 without any problems at all!
>
> Seems I spoke too soon! :(
>
> Although I certainly booted Hybris 1st time, subsequent boots
haven't been
> so successful.
>
> In any case, it looks like the SDRAM is the key... will look
closer at timing...
>
> Regards,
>
> --
> |              Mark McDougall                | "Electrical
Engineers do it
> |  <http://members.iinet.net.au/~msmcdoug>   |   with less
resistance!"
>

Mark McDougall wrote:

> I've added constraints to the SDRAM pins and now I can boot Hybris on the
> DE2 without any problems at all!

Seems I spoke too soon! :(

Although I certainly booted Hybris 1st time, subsequent boots haven't been
so successful.

In any case, it looks like the SDRAM is the key... will look closer at timing...

Regards,

--
|              Mark McDougall                | "Electrical Engineers do it
|  <http://members.iinet.net.au/~msmcdoug>   |   with less resistance!"

Javier Ruiz wrote:

> Now, i now for sure that the problem is in the SDRAM memory that cames
> with the news DE1 and DE2 boards.

Yup, that's the problem alright!

I've added constraints to the SDRAM pins and now I can boot Hybris on the
DE2 without any problems at all!

Let me know if you need any tips for the constraints.

Regards,

--
|              Mark McDougall                | "Electrical Engineers do it
|  <http://members.iinet.net.au/~msmcdoug>   |   with less resistance!"

Hello,

This email message is a notification to let you know that
a file has been uploaded to the Files area of the minimigtg68
group.

   File        : /A2V64S40CTP.pdf
   Uploaded by : soyandroid <soyandroid@...>
   Description : Datasheet of SDRAM mounted in new DE1 and DE2 Boards

You can access this file at the URL:
http://groups.yahoo.com/group/minimigtg68/files/A2V64S40CTP.pdf

To learn more about file sharing for your group, please visit:
http://help.yahoo.com/l/us/yahoo/groups/original/members/web/index.htmlfiles

Regards,

soyandroid <soyandroid@...>

----- Original Message -----

From: Mark McDougall

To: minimigtg68@yahoogroups.com

Sent: Wednesday, September 24, 2008 8:52 AM

Subject: [minimigtg68] DE2 & V13

Hi all,

Been having some problems with v13 and thought I'd see if anyone else has
had the same experience as me!?!

1st of all, I've downloaded the new v13 source and have built a project for
my own hardware, which has an EP2C35. I've copied the new spihost.rom to my
SD card and can boot Minimig and subsequent ADF images from the SD card no
problems.

However, if I program a DE2 with the pre-compiled .SOF file from v13 and use
the same SD card as above, I get nothing. Nothing at all! No video sync, no
LED light on reset - absolutely dead.

Ditto if I compile the DE2 project from the v13 sources.

Now, I have an old project from when I ported the DE1 port to the DE2,
before Tobias released a DE2 project. I replaced the top-level schematics in
this design with VHDL equivalents and a DE2 wrapper around the DE1
top-level. If I build this project - I get video sync and the OSD which says
that SPIHOST is found and booting. However, it never finishes booting and
often displays the OSD again - looping ad-infinitum. If I try resetting the
board with SW0, I get various results such as green screen, yellow screen,
grey screen, black screen - with and without the OSD message.

Time to look at timing methinks...

Regards,

--
| Mark McDougall | "Electrical Engineers do it
| <http://members.iinet.net.au/~msmcdoug> | with less resistance!"

Hi all,

Been having some problems with v13 and thought I'd see if anyone else has
had the same experience as me!?!

1st of all, I've downloaded the new v13 source and have built a project for
my own hardware, which has an EP2C35. I've copied the new spihost.rom to my
SD card and can boot Minimig and subsequent ADF images from the SD card no
problems.

However, if I program a DE2 with the pre-compiled .SOF file from v13 and use
the same SD card as above, I get nothing. Nothing at all! No video sync, no
LED light on reset - absolutely dead.

Ditto if I compile the DE2 project from the v13 sources.

Now, I have an old project from when I ported the DE1 port to the DE2,
before Tobias released a DE2 project. I replaced the top-level schematics in
this design with VHDL equivalents and a DE2 wrapper around the DE1
top-level. If I build this project - I get video sync and the OSD which says
that SPIHOST is found and booting. However, it never finishes booting and
often displays the OSD again - looping ad-infinitum. If I try resetting the
board with SW0, I get various results such as green screen, yellow screen,
grey screen, black screen - with and without the OSD message.

Time to look at timing methinks...

Regards,

--
|              Mark McDougall                | "Electrical Engineers do it
|  <http://members.iinet.net.au/~msmcdoug>   |   with less resistance!"