HI guys,

Recently i adquired a Terassic DE1 Board.

The minimig version 12e, already syntetized, runs very stable in the
board.

I syntetized successfully the version 12e, my self, but is not very
stable, hangs so often when the Amiga is accesing intessively to the
SDRAM.

I'm using Quartus II V7.2 SP3.

The only one error i get is in the timing analysis and is the following:

Clock Setup: 'amigaclk:inst8|altpll:altpll_component|_clk0'
slag -22.998 ns
required: 114.76 MHz ( period = 8.714 ns )
actual: 31.53 MHz ( period = 31.712 ns )

You get this error when do the syntesis?

The minimig version 13 doesnt run in my board, i tried several times
with different SD cards, but i was not able to load the kickstart, it
hangs after loading the spihost.

The difference i found in my Terasic DE1 pcb is that it uses a SDRAM
from PSC, A2V64S40CTP - G7 (G7 is 133MHZ SDRAM COMPATIBLE) instead of
the ISSI part found in the schematic.

Anybody has problems with version 13?

Best Regards
soyandroid

Hello.

Yesterday I flashed version 13 (pof) into DE1 and copied new
spihost.rom to cd card.

finds and loads spihost.rom and kick.rom (2x256)512kb Kick 1.3), but
just white screen, no insert floppy screen?!

Then flashed 12e with older spihost.rom on sd card and this works!

What might be the problem?
Could it be the artificial 2x256=512k kick 1.3 rom file?
Should I reformat the complete sd card?

Peter



--- In minimigtg68@yahoogroups.com, "TobiFlex" <t.gubener@...> wrote:
>
> Hello,
> Now I call my Amiga core with the Minimig Chipset and the
> TG68 "FAMPIGA". Please use the Files Version 13.
> Please test the new Future! Now you can write into the ADF Image files.
> But bee carefull. This Write Function is beta and I need your Feedback
> for bugfixing.
> SW[4] is the write protect switch for the Image. If SW[4] off the
> Image is write protect.
>
> Viele Grüße
> TobiFlex
>

Hello TobiFlex,

thank you, I actually expected that because this is basicly a
different hardware. Then I will try to make an own adf write support
for minimig. Or at least storing the files in a subfolder like \adf to
skip over the root entries limit :)

Regards
Sascha


--- In minimigtg68@yahoogroups.com, "TobiFlex" <t.gubener@...> wrote:
>
> Hello Sascha,
> the Fampiga Floppy-Emu is based on Dennis PIC-Code but it is not
> identical. I think you can't use the Code for the Minimig :-(
> The Fampiga MFM coding routines are written in Z80 ASM Code.
> Viele Grüße
> TobiFlex
>
> --- In minimigtg68@yahoogroups.com, "Miging" <mogli4000er@> wrote:
> >
> > --- In minimigtg68@yahoogroups.com, "TobiFlex" <t.gubener@> wrote:
> > >
> > > Hello,
> > > Now I call my Amiga core with the Minimig Chipset and the
> > > TG68 "FAMPIGA". Please use the Files Version 13.
> > > Please test the new Future! Now you can write into the ADF Image
> files.
> > > But bee carefull. This Write Function is beta and I need your
> Feedback
> > > for bugfixing.
> > > SW[4] is the write protect switch for the Image. If SW[4] off
> the
> > > Image is write protect.
> > >
> > > Viele Grüße
> > > TobiFlex
> > >
> >
> > Hallo TobiFlex,
> >
> > is this also working for the real minimig? is there enough free
> space
> > in that PIC Chip to flash the new firmware?
> > what else is to change for making ADF files writeable?
> > sorry for many questions ;) i am very new in this project.
> >
> > thx and regards
> > Sascha (german is also welcome)
> >
>

Hello Sascha,
the Fampiga Floppy-Emu is based on Dennis PIC-Code but it is not
identical. I think you can't use the Code for the Minimig :-(
The Fampiga MFM coding routines are written in Z80 ASM Code.
Viele Grüße
TobiFlex

--- In minimigtg68@yahoogroups.com, "Miging" <mogli4000er@...> wrote:
>
> --- In minimigtg68@yahoogroups.com, "TobiFlex" <t.gubener@> wrote:
> >
> > Hello,
> > Now I call my Amiga core with the Minimig Chipset and the
> > TG68 "FAMPIGA". Please use the Files Version 13.
> > Please test the new Future! Now you can write into the ADF Image
files.
> > But bee carefull. This Write Function is beta and I need your
Feedback
> > for bugfixing.
> > SW[4] is the write protect switch for the Image. If SW[4] off
the
> > Image is write protect.
> >
> > Viele Grüße
> > TobiFlex
> >
>
> Hallo TobiFlex,
>
> is this also working for the real minimig? is there enough free
space
> in that PIC Chip to flash the new firmware?
> what else is to change for making ADF files writeable?
> sorry for many questions ;) i am very new in this project.
>
> thx and regards
> Sascha (german is also welcome)
>

--- In minimigtg68@yahoogroups.com, "TobiFlex" <t.gubener@...> wrote:
>
> Hello,
> Now I call my Amiga core with the Minimig Chipset and the
> TG68 "FAMPIGA". Please use the Files Version 13.
> Please test the new Future! Now you can write into the ADF Image files.
> But bee carefull. This Write Function is beta and I need your Feedback
> for bugfixing.
> SW[4] is the write protect switch for the Image. If SW[4] off the
> Image is write protect.
>
> Viele Grüße
> TobiFlex
>

Hallo TobiFlex,

is this also working for the real minimig? is there enough free space
in that PIC Chip to flash the new firmware?
what else is to change for making ADF files writeable?
sorry for many questions ;) i am very new in this project.

thx and regards
Sascha (german is also welcome)

--- In minimigtg68@yahoogroups.com, "TobiFlex" <t.gubener@...> wrote:
>
> Hello,
> Now I call my Amiga core with the Minimig Chipset and the
> TG68 "FAMPIGA". Please use the Files Version 13.
> Please test the new Future! Now you can write into the ADF Image files.
> But bee carefull. This Write Function is beta and I need your Feedback
> for bugfixing.
> SW[4] is the write protect switch for the Image. If SW[4] off the
> Image is write protect.
>
> Viele Grüße
> TobiFlex
>
Tested the write function, the image (adf) were changed and the SW 4
is not protecting against writing. Some were corrupted after a while
(using
little computer people). Using the editor program, I noticed the
keyboard interface was messed up once SW[4} was on, all kind of
characters show up in the editor (workbench).

Ok, duh.  I see it now.  It's a daughterboard plugged into the GPIO connector. 
I'm just brain
dead today.  :-)

Scott

I'd like some tips on this as well.  After looking at the schematic and photos
for the adapter
board and connector, I was wondering:  Why solder resistors and jumpers to the
DE1/DE2
board?  Or am I looking at the pictures wrong?  Couldn't those be placed on the
adapter
board?

Inquiring minds want to know!


Scott

Thanks!  I *REALLY* want to play with this!

Scott

Welcome here Scott!
I think the DE1 is fine. Here are the fitting files for DE1 and DE2:

Fitter Status : Successful - Fri Apr 18 22:05:41 2008
Quartus II Version : 7.2 Build 207 03/18/2008 SP 3 SJ Web Edition
Revision Name : minimig_de1
Top-level Entity Name : minimig_de1
Family : Cyclone II
Device : EP2C20F484C7
Timing Models : Final
Total logic elements : 11,898 / 18,752 ( 63 % )
     Total combinational functions : 10,286 / 18,752 ( 55 % )
     Dedicated logic registers : 5,445 / 18,752 ( 29 % )
Total registers : 5445
Total pins : 236 / 315 ( 75 % )
Total virtual pins : 0
Total memory bits : 179,804 / 239,616 ( 75 % )
Embedded Multiplier 9-bit elements : 4 / 52 ( 8 % )
Total PLLs : 1 / 4 ( 25 % )



Fitter Status : Successful - Fri Apr 18 21:06:17 2008
Quartus II Version : 7.2 Build 207 03/18/2008 SP 3 SJ Web Edition
Revision Name : minimig_de2
Top-level Entity Name : minimig_de2
Family : Cyclone II
Device : EP2C35F672C6
Timing Models : Final
Total logic elements : 13,157 / 33,216 ( 40 % )
     Total combinational functions : 10,863 / 33,216 ( 33 % )
     Dedicated logic registers : 6,523 / 33,216 ( 20 % )
Total registers : 6523
Total pins : 292 / 475 ( 61 % )
Total virtual pins : 75
Total memory bits : 332,380 / 483,840 ( 69 % )
Embedded Multiplier 9-bit elements : 4 / 70 ( 6 % )
Total PLLs : 1 / 4 ( 25 % )

Viele Grüße
TobiFlex

--- In minimigtg68@yahoogroups.com, "scottduensing" <scott@...>
wrote:
>
> I currently do not have a board to run this project on.  Should I
get the more expensive DE2
> or is the DE1 fine?  How much FPGA space does the current
implementation use?  I'm new to
> all this FPGA stuff, but it sure looks fun!
>
> Thanks!
>
>
> Scott
>

I currently do not have a board to run this project on.  Should I get the more
expensive DE2
or is the DE1 fine?  How much FPGA space does the current implementation use? 
I'm new to
all this FPGA stuff, but it sure looks fun!

Thanks!


Scott

Hi,

Can anybode recommend an easy way to create the daughter board for
connecting the mouse and the joystick?

The Fampiga runs fine, it runs the same demos as the 12c version.

greets,
Sander

Hello,

Sorry I overlooked the source files. Compiled the new version and tested
Little Computer People, the program starts but still testing the write
to floppy. I also added a new file for the PS2 keyboard routine, I
eliminated the Numlock function for very small keyboard.

Hello,
I checked my setup again - and it works with the .pof and with
the .sof that i have published.
Please reformat your SD Card copy the files and try it again. The
new spihost.rom has only effect with the new config file. If you use
the new spihost.rom and the 12e config file is the adf Image always
write protected.

--- In minimigtg68@yahoogroups.com, "sarsipri" <alfco@...> wrote:
>
> --- In minimigtg68@yahoogroups.com, "TobiFlex" <t.gubener@> wrote:
> >
> > Tell me more about your Problem, Please. You must use the new
> > spihost.rom firmware and the minimig_de1.sof to config the 2c20.
> > The are only little changes between v12e and v13. Look into the
> > minimig1.v file and the bigrom sourcecode.
> > Viele Grüße
> > TobiFlex
> >
> Hello,
>
> I use the pof file from v13 to check, after I flashed the DE1 the
> minimig does not start. I checked again using the 12e version,
this
> works. As test program I will use little computer people (it stop
after
> a while when it want to write change to the adf).
>

--- In minimigtg68@yahoogroups.com, "TobiFlex" <t.gubener@...> wrote:
>
> Tell me more about your Problem, Please. You must use the new
> spihost.rom firmware and the minimig_de1.sof to config the 2c20.
> The are only little changes between v12e and v13. Look into the
> minimig1.v file and the bigrom sourcecode.
> Viele Grüße
> TobiFlex
>
Hello,

I use the pof file from v13 to check, after I flashed the DE1 the
minimig does not start. I checked again using the 12e version, this
works. As test program I will use little computer people (it stop after
a while when it want to write change to the adf).

Tell me more about your Problem, Please. You must use the new
spihost.rom firmware and the minimig_de1.sof to config the 2c20.
The are only little changes between v12e and v13. Look into the
minimig1.v file and the bigrom sourcecode.
Viele Grüße
TobiFlex

--- In minimigtg68@yahoogroups.com, "sarsipri" <alfco@...> wrote:
>
> --- In minimigtg68@yahoogroups.com, "TobiFlex" <t.gubener@> wrote:
> >
> > Hello,
> > Now I call my Amiga core with the Minimig Chipset and the
> > TG68 "FAMPIGA". Please use the Files Version 13.
> > Please test the new Future! Now you can write into the ADF Image
> files.
> > But bee carefull. This Write Function is beta and I need your
> Feedback
> > for bugfixing.
> > SW[4] is the write protect switch for the Image. If SW[4] off
the
> > Image is write protect.
> >
> > Viele Grüße
> > TobiFlex
> >
> Hello,
>
> I tested it with the new spihost.rom, but it does not work. The
new
> spihost.rom works in the 12e version. Can you release the part you
> modify in source, to recompile version 13?
>

Hello,
I have not the Time to do this yet. First I will fineshed the new
Startup System for the C-One. Sorry.
Viele Grüße
TobiFlex



--- In minimigtg68@yahoogroups.com, "fordp2002" <SimonEllwood@...>
wrote:
>
> Hi TobiFlex and fellow FPGA Enthusiasts :-
>
> I know this is some what off topic but do you have Altera DE1 HDL
for
> the CPC ???
>
> I can find you mentioned with a FPGA CPC in the past, but I can
find
> no sign of a port to DE1.
>
> FordP
> MiniMorph.com
>
> Note the MiniMorph.com website is in a sorry state due to spammers
and
> lack of time at the moment. I hope to bring it back before too
long.
>
> All the best.
>

--- In minimigtg68@yahoogroups.com, "TobiFlex" <t.gubener@...> wrote:
>
> Hello,
> Now I call my Amiga core with the Minimig Chipset and the
> TG68 "FAMPIGA". Please use the Files Version 13.
> Please test the new Future! Now you can write into the ADF Image
files.
> But bee carefull. This Write Function is beta and I need your
Feedback
> for bugfixing.
> SW[4] is the write protect switch for the Image. If SW[4] off the
> Image is write protect.
>
> Viele Grüße
> TobiFlex
>
Hello,

I tested it with the new spihost.rom, but it does not work. The new
spihost.rom works in the 12e version. Can you release the part you
modify in source, to recompile version 13?

Hello,

i have done it a year ago. Based on Tobiflexs DE2 Code.
You can download it from:

http://drunken.intershit.com/cpctrex_DE1_Port1.rar

So far no SD card and no sound output ...

--- In minimigtg68@yahoogroups.com, "Daryl Richards" <daryl@...> wrote:
>
> I also would like to see this! Please please!
>
> -----Original Message-----
> From: "Ronivon Costa" <ronivon.costa@...>
>
> Date: Sat, 19 Apr 2008 15:54:23
> To:minimigtg68@yahoogroups.com
> Subject: Re: [minimigtg68] Amstrad/Schneider CPC / S for Altera DE1
>
>
> I am also interested in the CPC core, it would be nice to it for DE1.
>
> :)
>
>
> 2008/4/19, fordp2002 <SimonEllwood@ <mailto:SimonEllwood@...>
hotmail.com>:
>
>
>
>
> Hi TobiFlex and fellow FPGA Enthusiasts :-
>
>  I know this is some what off topic but do you have Altera DE1 HDL for
>  the CPC ???
>
>  I can find you mentioned with a FPGA CPC in the past, but I can find
>  no sign of a port to DE1.
>
>  FordP
>  MiniMorph.com
>
>  Note the MiniMorph.com website is in a sorry state due to spammers and
>  lack of time at the moment. I hope to bring it back before too long.
>
>  All the best.
>
>
>
>
> --
> --
> Visit my personal page: http://ronivon.
<http://ronivon.costa.googlepages.com/> costa.googlepages.com/
> --
> Ronivon C. Costa
> IBM TIVOLI Certified Consultant & Instructor
>  VOIP Phone: (+55) (19) 3119-7083 (Brasil) - Cel: (+351) 96 676 4458
(Portugal)
> Skype: ronivon.costa  / Messenger: ronivon@hotmail.
<mailto:ronivon@...> com
>

I also would like to see this! Please please!

-----Original Message-----
From: "Ronivon Costa" <ronivon.costa@...>

Date: Sat, 19 Apr 2008 15:54:23
To:minimigtg68@yahoogroups.com
Subject: Re: [minimigtg68] Amstrad/Schneider CPC / S for Altera DE1


I am also interested in the CPC core, it would be nice to it for DE1.

:)


2008/4/19, fordp2002 <SimonEllwood@ <mailto:SimonEllwood@...>
hotmail.com>:




Hi TobiFlex and fellow FPGA Enthusiasts :-

  I know this is some what off topic but do you have Altera DE1 HDL for
  the CPC ???

  I can find you mentioned with a FPGA CPC in the past, but I can find
  no sign of a port to DE1.

  FordP
  MiniMorph.com

  Note the MiniMorph.com website is in a sorry state due to spammers and
  lack of time at the moment. I hope to bring it back before too long.

  All the best.




--
--
Visit my personal page: http://ronivon. <http://ronivon.costa.googlepages.com/>
costa.googlepages.com/
--
Ronivon C. Costa
IBM TIVOLI Certified Consultant & Instructor
  VOIP Phone: (+55) (19) 3119-7083 (Brasil) - Cel: (+351) 96 676 4458 (Portugal)
Skype: ronivon.costa  / Messenger: ronivon@hotmail. <mailto:ronivon@...>
com

Hi TobiFlex and fellow FPGA Enthusiasts :-

I know this is some what off topic but do you have Altera DE1 HDL for
the CPC ???

I can find you mentioned with a FPGA CPC in the past, but I can find
no sign of a port to DE1.

FordP
MiniMorph.com

Note the MiniMorph.com website is in a sorry state due to spammers and
lack of time at the moment. I hope to bring it back before too long.

All the best.

Hello,
Now I call my Amiga core with the Minimig Chipset and the
TG68 "FAMPIGA". Please use the Files Version 13.
Please test the new Future! Now you can write into the ADF Image files.
But bee carefull. This Write Function is beta and I need your Feedback
for bugfixing.
SW[4] is the write protect switch for the Image. If SW[4] off the
Image is write protect.

Viele Grüße
TobiFlex

On http://www.amiga.org riftcon, piru and i discuss about the 68sec000.
Now it look like the 68SEC000 is a 68000. The "Move from CCR" is
illegal and "Move from SR" is not privileged. What's matter with the
68EC000 we don't know. We must find somebody who can test it with a
real 68EC000.

Now I say: the 68SEC000 is a good choise for the minimig.
But the TG68 is also good and you can clock the TG68 higher.

--- In minimigtg68@yahoogroups.com, "Jaime Cagigal" <jcagigal@...>
wrote:
>
> 2008/3/6, TobiFlex <t.gubener@...>:
> >
> > Here you can see the fist try to make the minimigtg68 faster:
> >
http://gamesource.ph.groups.yahoo.com/group/minimigtg68/photos/view/d
50
> >  8?b=2&m=f&o=0
> >  or if the link not work look into the Photos section.
> >
> >  I call the new Baby
> >
> >  AM IGA
> >  FAMPIGA
> >  F  P GA
> >
> >  It it is based on the minimig chipset and the TG68_fast IP Core.
> >  I only remove the tg68 wapper and the M68K_bridge from the
design and
> >  can increase the speed x3 :-)
> >
> Wow!!!
>
> Your work is impressive! :-)
>
> Even if SysInfo is not the best Amiga benchmark I guess that your
core
> gives more accurate speed than emulators... so it's really fast! It
> would be interesting if RedSkull could test your new 68k core on a
> DE-1 board and report results...
>
> I'm curious... the new core works as an asynchronous accelerator
on A500?
>
> 68020 emulation probably wouldn't be impossible so I guess that an
> entire A1200 could be implemented in the future with the same
hardware
> (I think gfx capabilities of DE-1 board perhaps won't allow 24bit
> colours but it would be cool anyway...)
>
>
> --
> Saludos/Best Regards
> Jaime Cagigal
>
It isn't a new 68K Core. But I use only the kernal of the tg68 Core.
The Screenshot is made with a DE1 Board. But the is not a 68020. It
is a fast 68000 :-)

2008/3/6, TobiFlex <t.gubener@...>:
>
> Here you can see the fist try to make the minimigtg68 faster:
>  http://gamesource.ph.groups.yahoo.com/group/minimigtg68/photos/view/d50
>  8?b=2&m=f&o=0
>  or if the link not work look into the Photos section.
>
>  I call the new Baby
>
>  AM IGA
>  FAMPIGA
>  F  P GA
>
>  It it is based on the minimig chipset and the TG68_fast IP Core.
>  I only remove the tg68 wapper and the M68K_bridge from the design and
>  can increase the speed x3 :-)
>
Wow!!!

Your work is impressive! :-)

Even if SysInfo is not the best Amiga benchmark I guess that your core
gives more accurate speed than emulators... so it's really fast! It
would be interesting if RedSkull could test your new 68k core on a
DE-1 board and report results...

I'm curious... the new core works as an asynchronous accelerator on A500?

68020 emulation probably wouldn't be impossible so I guess that an
entire A1200 could be implemented in the future with the same hardware
(I think gfx capabilities of DE-1 board perhaps won't allow 24bit
colours but it would be cool anyway...)


--
Saludos/Best Regards
Jaime Cagigal

Here you can see the fist try to make the minimigtg68 faster:
http://gamesource.ph.groups.yahoo.com/group/minimigtg68/photos/view/d50
8?b=2&m=f&o=0
or if the link not work look into the Photos section.

I call the new Baby

  AM IGA
FAMPIGA
F  P GA

It it is based on the minimig chipset and the TG68_fast IP Core.
I only remove the tg68 wapper and the M68K_bridge from the design and
can increase the speed x3 :-)

Viele Grüße
TobiFlex

Mark McDougall wrote:

Hello,

> The Minimig does the arbitration within the controller itself, but I guess
> there's no reason you couldn't do it outside the controller and leave it
> unchanged - much like the arbiters in Altera's SOPC system. Some time ago I
> wrote a simple arbiter for wishbone based on the example in the old
> wishbone documentation...

Could you sum up the requirements for the minimig SDRAM access?
(operating frequency; maximal latency: data width.. )

Sorry for noch checking the Minimig sources for myself....

   j.

Magnus Wedmark wrote:

> Thank you for the tip about the DDR-controller. I've seen it but I
> would really like a good example of it in use.. Have you seen some?
> I'm used to working with SRAM so if it only could be just as simple..

One (other) obstacle you'll face in using another DDR controller in Minimig
is that the controller needs to arbitrate between 68K and Z80 accesses - so
you'll notice there's two bus interfaces on the Minimig controller.

The Minimig does the arbitration within the controller itself, but I guess
there's no reason you couldn't do it outside the controller and leave it
unchanged - much like the arbiters in Altera's SOPC system. Some time ago I
wrote a simple arbiter for wishbone based on the example in the old wishbone
documentation...

Regards,

--
|              Mark McDougall                | "Electrical Engineers do it
|  <http://members.iinet.net.au/~msmcdoug>   |   with less resistance!"