Mark McDougall wrote:

> I've added constraints to the SDRAM pins and now I can boot Hybris on the
> DE2 without any problems at all!

Seems I spoke too soon! :(

Although I certainly booted Hybris 1st time, subsequent boots haven't been
so successful.

In any case, it looks like the SDRAM is the key... will look closer at timing...

Regards,

--
|              Mark McDougall                | "Electrical Engineers do it
|  <http://members.iinet.net.au/~msmcdoug>   |   with less resistance!"

Javier Ruiz wrote:

> Now, i now for sure that the problem is in the SDRAM memory that cames
> with the news DE1 and DE2 boards.

Yup, that's the problem alright!

I've added constraints to the SDRAM pins and now I can boot Hybris on the
DE2 without any problems at all!

Let me know if you need any tips for the constraints.

Regards,

--
|              Mark McDougall                | "Electrical Engineers do it
|  <http://members.iinet.net.au/~msmcdoug>   |   with less resistance!"

Hello,

This email message is a notification to let you know that
a file has been uploaded to the Files area of the minimigtg68
group.

   File        : /A2V64S40CTP.pdf
   Uploaded by : soyandroid <soyandroid@...>
   Description : Datasheet of SDRAM mounted in new DE1 and DE2 Boards

You can access this file at the URL:
http://groups.yahoo.com/group/minimigtg68/files/A2V64S40CTP.pdf

To learn more about file sharing for your group, please visit:
http://help.yahoo.com/l/us/yahoo/groups/original/members/web/index.htmlfiles

Regards,

soyandroid <soyandroid@...>

----- Original Message -----

From: Mark McDougall

To: minimigtg68@yahoogroups.com

Sent: Wednesday, September 24, 2008 8:52 AM

Subject: [minimigtg68] DE2 & V13

Hi all,

Been having some problems with v13 and thought I'd see if anyone else has
had the same experience as me!?!

1st of all, I've downloaded the new v13 source and have built a project for
my own hardware, which has an EP2C35. I've copied the new spihost.rom to my
SD card and can boot Minimig and subsequent ADF images from the SD card no
problems.

However, if I program a DE2 with the pre-compiled .SOF file from v13 and use
the same SD card as above, I get nothing. Nothing at all! No video sync, no
LED light on reset - absolutely dead.

Ditto if I compile the DE2 project from the v13 sources.

Now, I have an old project from when I ported the DE1 port to the DE2,
before Tobias released a DE2 project. I replaced the top-level schematics in
this design with VHDL equivalents and a DE2 wrapper around the DE1
top-level. If I build this project - I get video sync and the OSD which says
that SPIHOST is found and booting. However, it never finishes booting and
often displays the OSD again - looping ad-infinitum. If I try resetting the
board with SW0, I get various results such as green screen, yellow screen,
grey screen, black screen - with and without the OSD message.

Time to look at timing methinks...

Regards,

--
| Mark McDougall | "Electrical Engineers do it
| <http://members.iinet.net.au/~msmcdoug> | with less resistance!"

Hi all,

Been having some problems with v13 and thought I'd see if anyone else has
had the same experience as me!?!

1st of all, I've downloaded the new v13 source and have built a project for
my own hardware, which has an EP2C35. I've copied the new spihost.rom to my
SD card and can boot Minimig and subsequent ADF images from the SD card no
problems.

However, if I program a DE2 with the pre-compiled .SOF file from v13 and use
the same SD card as above, I get nothing. Nothing at all! No video sync, no
LED light on reset - absolutely dead.

Ditto if I compile the DE2 project from the v13 sources.

Now, I have an old project from when I ported the DE1 port to the DE2,
before Tobias released a DE2 project. I replaced the top-level schematics in
this design with VHDL equivalents and a DE2 wrapper around the DE1
top-level. If I build this project - I get video sync and the OSD which says
that SPIHOST is found and booting. However, it never finishes booting and
often displays the OSD again - looping ad-infinitum. If I try resetting the
board with SW0, I get various results such as green screen, yellow screen,
grey screen, black screen - with and without the OSD message.

Time to look at timing methinks...

Regards,

--
|              Mark McDougall                | "Electrical Engineers do it
|  <http://members.iinet.net.au/~msmcdoug>   |   with less resistance!"

----- Original Message -----

From: Mark McDougall

To: minimigtg68@yahoogroups.com

Sent: Friday, August 22, 2008 3:05 PM

Subject: Re: [minimigtg68] Quartus v8.0 SP1 - build OK!

Mark McDougall wrote:

> The new build also works - for the very 1st time - on my P2 platform!

Which begs the question - "Is there something marginal in the design of
Minimig, or is Quartus v7.x broken?"

Regards,

--
| Mark McDougall | "Electrical Engineers do it
| <http://members.iinet.net.au/~msmcdoug> | with less resistance!"

Mark McDougall wrote:

> The new build also works - for the very 1st time - on my P2 platform!

Which begs the question - "Is there something marginal in the design of
Minimig, or is Quartus v7.x broken?"

Regards,

--
|              Mark McDougall                | "Electrical Engineers do it
|  <http://members.iinet.net.au/~msmcdoug>   |   with less resistance!"

The new build also works - for the very 1st time - on my P2 platform!

Played Hybris with the Gamecube controller! ;)

Regards,

--
|              Mark McDougall                | "Electrical Engineers do it
|  <http://members.iinet.net.au/~msmcdoug>   |   with less resistance!"

Hi,

Just to let you know, I've had success with the DE1 build (12e_new?) under
Quartus v8.0 SP1!

Regards,

--
|              Mark McDougall                | "Electrical Engineers do it
|  <http://members.iinet.net.au/~msmcdoug>   |   with less resistance!"

Hello,

I once had an Amiga 500 and 600 and had to sell both because that
stupid 486 PC was so expensive - and I regret that till this day.
Whenever my heart aches I "surf for Amiga stuff" and I found minimig
and minimigtg68, so, uh, hi!

I absolutely like the open-source flavor this project has. However, I
didn't really find "the usual" development infrastructure in place for
minimig/minimigtg68 - no source repository (CVS, SVN, whatever
versiong system) or e.g. a bug tracker. How do you guys coordinate?
Are there really "just" the source downloads over at Dennis' site?

My experience is that having such infrastructure in place usually
makes sense to keep things transparent and to make sure people don't
"drift" away, hacking e.g. on outdated sources (which can make things
hard to merge back). Having a bugtracker is usually a good idea to see
where things are moving and where issues persist.

For a GPLed project like this there should be plenty of hosting
opportunities (e.g. sourceforge.net) so I wonder what rationale there
is to keep things like they are. Did I miss something?

bye,

Maik

--- In minimigtg68@yahoogroups.com, "scottduensing" <scott@...> wrote:
>
> I currently do not have a board to run this project on.  Should I get
the more expensive DE2
> or is the DE1 fine?  How much FPGA space does the current
implementation use?  I'm new to
> all this FPGA stuff, but it sure looks fun!
>
> Thanks!
>
>
> Scott
>

There's a DE2 on Ebay!

http://cgi.ebay.co.uk/ws/eBayISAPI.dll?
ViewItem&rd=1&item=200235340764&ssPageName=STRK:MESE:IT&ih=010

There is a nice looking DE2 on Ebay - hardly used by what I can see!

http://cgi.ebay.co.uk/ws/eBayISAPI.dll?
ViewItem&rd=1&item=200235340764&ssPageName=STRK:MESE:IT&ih=010

Perhaps I found a major bug trace. Using kickstart 2.0 raw cli,
dragging the screen down will shift or "destroy" bitplane below
line 200 (NTSC range).
In Kickstart 1.x it is working correct, most likely 2.0 use a
different copper list.

I already change the copper and got a bit better result, also in some
demos it shows little improvement.
Still this instruction $FFDF,$FFFE could not work right or will be
ignored?
Would be nice if somebody could crosscheck this.

digest of copper.v in this matter (very last part):

//generate request dma (reqdma) signal
//for a dma to be requested first of all the cycle must be right
(horbeam[1:0])
//second, selins or selreg must be true (state machine request bus
operation)
//the last cycle in a line is not usable by the copper
always @(selins or selreg or horbeam[1:0])
	 if( (horbeam[1:0]==2'b01) && (selins || selreg) )//request dma cycle
//(horbeam[8:2]!=7'b1110001) &&
		 reqdma=1;
	 else
		 reqdma=0;

Hi TobiFlex,

here is a working (original) minimig with kick2.0 using MC68SEC000 cpu.
http://gamesource.ph.groups.yahoo.com/group/minimigtg68/photos/browse/9afc?c=
Until now all kickstarts are working, even some hacks of 1.2 :-)

It would be nice to see minimig running with your 68000 soft core!

Schöne Grüße
boing4000

--- In minimigtg68@yahoogroups.com, "TobiFlex" <t.gubener@...> wrote:
>
> I have never seen a picture from a minimig with a 2.04 bootscreen.
> But the minimigtg68 can boot all versions of kickstartrom.

Today I had some time so spending about 2-3 hours testing my new DE1
with different minimig_de1 versions:

V13 with corresponding spihost.rom = doesn't run at all?
V13 with older spihost.rom = works but very unstable .. not useable..
V12e = works, but artificial key presses .. also reset.. not useable.
V12c = works and stable! But NO Joystick support :-(

Quite disappointing results..
On my older DE1, 12e runs just fine.. But until this issues are not
solved, I am not going to touch this running setup..

So is someone able to try to create a V13, that actually works on a
new DE1 or make a 12c with joystick support..?

Peter


--- In minimigtg68@yahoogroups.com, "soyandroid" <android@...> wrote:
>
> HI guys,
>
> Recently i adquired a Terassic DE1 Board.
>
> The minimig version 12e, already syntetized, runs very stable in the
> board.
>
> I syntetized successfully the version 12e, my self, but is not very
> stable, hangs so often when the Amiga is accesing intessively to the
> SDRAM.
>
> I'm using Quartus II V7.2 SP3.
>
> The only one error i get is in the timing analysis and is the following:
>
> Clock Setup: 'amigaclk:inst8|altpll:altpll_component|_clk0'
> slag -22.998 ns
> required: 114.76 MHz ( period = 8.714 ns )
> actual: 31.53 MHz ( period = 31.712 ns )
>
> You get this error when do the syntesis?
>
> The minimig version 13 doesnt run in my board, i tried several times
> with different SD cards, but i was not able to load the kickstart, it
> hangs after loading the spihost.
>
> The difference i found in my Terasic DE1 pcb is that it uses a SDRAM
> from PSC, A2V64S40CTP - G7 (G7 is 133MHZ SDRAM COMPATIBLE) instead of
> the ISSI part found in the schematic.
>
> Anybody has problems with version 13?
>
> Best Regards
> soyandroid
>

Forgot to mention, that 12c runs also fine on the brand new DE1.
No artificial key pressed etc. But 12c doesn't has joystick support..
so is quite limited in the number of games that one can run...

Is there actually still a 12d available somewhere..?

Peter

--- In minimigtg68@yahoogroups.com, "petersieg" <peter.sieg1@...> wrote:
>
> Hi. I had similiar problems with a brand new DE1 board. However,
> version 13 runs with the older spihost.rom from 12e!! I have no clue,
> what the problem really is, but obvious somewhere around the spihost,
> Z80 emulation..?
>
> I had 12e on it.. it runs, but from time to time, it 'sees' key
> pressed (F12 menu pop ups, selecting adf file, RESET!).. so actually
>  ist not useable..?? This behaviour ist gone with 13.. But 12e runs
> just fine on an older DE1!?
>
> Whould be interesting, if you could confirm these observations..
>
> Regards, Peter
>
> --- In minimigtg68@yahoogroups.com, "soyandroid" <android@> wrote:
> >
> > HI guys,
> >
> > Recently i adquired a Terassic DE1 Board.
> >
> > The minimig version 12e, already syntetized, runs very stable in the
> > board.
> >
> > I syntetized successfully the version 12e, my self, but is not very
> > stable, hangs so often when the Amiga is accesing intessively to the
> > SDRAM.
> >
> > I'm using Quartus II V7.2 SP3.
> >
> > The only one error i get is in the timing analysis and is the
following:
> >
> > Clock Setup: 'amigaclk:inst8|altpll:altpll_component|_clk0'
> > slag -22.998 ns
> > required: 114.76 MHz ( period = 8.714 ns )
> > actual: 31.53 MHz ( period = 31.712 ns )
> >
> > You get this error when do the syntesis?
> >
> > The minimig version 13 doesnt run in my board, i tried several times
> > with different SD cards, but i was not able to load the kickstart, it
> > hangs after loading the spihost.
> >
> > The difference i found in my Terasic DE1 pcb is that it uses a SDRAM
> > from PSC, A2V64S40CTP - G7 (G7 is 133MHZ SDRAM COMPATIBLE) instead of
> > the ISSI part found in the schematic.
> >
> > Anybody has problems with version 13?
> >
> > Best Regards
> > soyandroid
> >
>

Hi. I had similiar problems with a brand new DE1 board. However,
version 13 runs with the older spihost.rom from 12e!! I have no clue,
what the problem really is, but obvious somewhere around the spihost,
Z80 emulation..?

I had 12e on it.. it runs, but from time to time, it 'sees' key
pressed (F12 menu pop ups, selecting adf file, RESET!).. so actually
  ist not useable..?? This behaviour ist gone with 13.. But 12e runs
just fine on an older DE1!?

Whould be interesting, if you could confirm these observations..

Regards, Peter

--- In minimigtg68@yahoogroups.com, "soyandroid" <android@...> wrote:
>
> HI guys,
>
> Recently i adquired a Terassic DE1 Board.
>
> The minimig version 12e, already syntetized, runs very stable in the
> board.
>
> I syntetized successfully the version 12e, my self, but is not very
> stable, hangs so often when the Amiga is accesing intessively to the
> SDRAM.
>
> I'm using Quartus II V7.2 SP3.
>
> The only one error i get is in the timing analysis and is the following:
>
> Clock Setup: 'amigaclk:inst8|altpll:altpll_component|_clk0'
> slag -22.998 ns
> required: 114.76 MHz ( period = 8.714 ns )
> actual: 31.53 MHz ( period = 31.712 ns )
>
> You get this error when do the syntesis?
>
> The minimig version 13 doesnt run in my board, i tried several times
> with different SD cards, but i was not able to load the kickstart, it
> hangs after loading the spihost.
>
> The difference i found in my Terasic DE1 pcb is that it uses a SDRAM
> from PSC, A2V64S40CTP - G7 (G7 is 133MHZ SDRAM COMPATIBLE) instead of
> the ISSI part found in the schematic.
>
> Anybody has problems with version 13?
>
> Best Regards
> soyandroid
>

Hi All,

Just tried compiling the project with the new Q8.0, results are
encouraging.
Compile time on my system comapred with 7.2SP3 is down about 20%.

Sample flow report:

Flow report for minimig_de1
Mon Jun 02 22:05:57 2008
Quartus II Version 8.0 Build 215 05/29/2008 SJ Full Version


+-----------------------------------------------------------------+
; Flow Summary                                                    ;
+------------------------------------+----------------------------+
; Flow Status                        ; Successful - Mon Jun 02    ;
;                                                22:05:56 2008    ;
; Quartus II Version                 ; 8.0 Build 215 05/29/2008   ;
;                                      SJ Full Version            ;
; Revision Name                      ; minimig_de1                ;
; Top-level Entity Name              ; minimig_de1                ;
; Family                             ; Cyclone II                 ;
; Device                             ; EP2C20F484C7               ;
; Timing Models                      ; Final                      ;
; Met timing requirements            ; No                         ;
; Total logic elements               ; 14,565 / 18,752 ( 78 % )   ;
;     Total combinational functions  ; 12,232 / 18,752 ( 65 % )   ;
;     Dedicated logic registers      ; 5,954 / 18,752 ( 32 % )    ;
; Total registers                    ; 5954                       ;
; Total pins                         ; 236 / 315 ( 75 % )         ;
; Total virtual pins                 ; 0                          ;
; Total memory bits                  ; 178,716 / 239,616 ( 75 % ) ;
; Embedded Multiplier 9-bit elements ; 4 / 52 ( 8 % )             ;
; Total PLLs                         ; 1 / 4 ( 25 % )             ;
+------------------------------------+----------------------------+
+-----------------------------------------------------------------+
; Flow Elapsed Time                                               ;
+-------------------------+--------------+---------------+---- ---+
; Module Name             ; Elapsed Time ; Peak Virt Mem ; Tot CPU;
+-------------------------+--------------+---------------+--------+
; Analysis & Synthesis    ; 00:03:45     ; 267 MB        ;00:03:39;
; Fitter                  ; 00:02:24     ; 326 MB        ;00:03:04;
; Assembler               ; 00:00:05     ; 231 MB        ;00:00:03;
; Classic Timing Analyzer ; 00:00:27     ; 306 MB        ;00:00:28;
; Total                   ; 00:06:41     ; --            ;00:07:14;
+-------------------------+--------------+---------------+--------+


Looking forward to being able to spend some more time on this project
in the near future :)

Cheers,
Leslie

HI guys,

Recently i adquired a Terassic DE1 Board.

The minimig version 12e, already syntetized, runs very stable in the
board.

I syntetized successfully the version 12e, my self, but is not very
stable, hangs so often when the Amiga is accesing intessively to the
SDRAM.

I'm using Quartus II V7.2 SP3.

The only one error i get is in the timing analysis and is the following:

Clock Setup: 'amigaclk:inst8|altpll:altpll_component|_clk0'
slag -22.998 ns
required: 114.76 MHz ( period = 8.714 ns )
actual: 31.53 MHz ( period = 31.712 ns )

You get this error when do the syntesis?

The minimig version 13 doesnt run in my board, i tried several times
with different SD cards, but i was not able to load the kickstart, it
hangs after loading the spihost.

The difference i found in my Terasic DE1 pcb is that it uses a SDRAM
from PSC, A2V64S40CTP - G7 (G7 is 133MHZ SDRAM COMPATIBLE) instead of
the ISSI part found in the schematic.

Anybody has problems with version 13?

Best Regards
soyandroid

Hello.

Yesterday I flashed version 13 (pof) into DE1 and copied new
spihost.rom to cd card.

finds and loads spihost.rom and kick.rom (2x256)512kb Kick 1.3), but
just white screen, no insert floppy screen?!

Then flashed 12e with older spihost.rom on sd card and this works!

What might be the problem?
Could it be the artificial 2x256=512k kick 1.3 rom file?
Should I reformat the complete sd card?

Peter



--- In minimigtg68@yahoogroups.com, "TobiFlex" <t.gubener@...> wrote:
>
> Hello,
> Now I call my Amiga core with the Minimig Chipset and the
> TG68 "FAMPIGA". Please use the Files Version 13.
> Please test the new Future! Now you can write into the ADF Image files.
> But bee carefull. This Write Function is beta and I need your Feedback
> for bugfixing.
> SW[4] is the write protect switch for the Image. If SW[4] off the
> Image is write protect.
>
> Viele Grüße
> TobiFlex
>

Hello TobiFlex,

thank you, I actually expected that because this is basicly a
different hardware. Then I will try to make an own adf write support
for minimig. Or at least storing the files in a subfolder like \adf to
skip over the root entries limit :)

Regards
Sascha


--- In minimigtg68@yahoogroups.com, "TobiFlex" <t.gubener@...> wrote:
>
> Hello Sascha,
> the Fampiga Floppy-Emu is based on Dennis PIC-Code but it is not
> identical. I think you can't use the Code for the Minimig :-(
> The Fampiga MFM coding routines are written in Z80 ASM Code.
> Viele Grüße
> TobiFlex
>
> --- In minimigtg68@yahoogroups.com, "Miging" <mogli4000er@> wrote:
> >
> > --- In minimigtg68@yahoogroups.com, "TobiFlex" <t.gubener@> wrote:
> > >
> > > Hello,
> > > Now I call my Amiga core with the Minimig Chipset and the
> > > TG68 "FAMPIGA". Please use the Files Version 13.
> > > Please test the new Future! Now you can write into the ADF Image
> files.
> > > But bee carefull. This Write Function is beta and I need your
> Feedback
> > > for bugfixing.
> > > SW[4] is the write protect switch for the Image. If SW[4] off
> the
> > > Image is write protect.
> > >
> > > Viele Grüße
> > > TobiFlex
> > >
> >
> > Hallo TobiFlex,
> >
> > is this also working for the real minimig? is there enough free
> space
> > in that PIC Chip to flash the new firmware?
> > what else is to change for making ADF files writeable?
> > sorry for many questions ;) i am very new in this project.
> >
> > thx and regards
> > Sascha (german is also welcome)
> >
>

Hello Sascha,
the Fampiga Floppy-Emu is based on Dennis PIC-Code but it is not
identical. I think you can't use the Code for the Minimig :-(
The Fampiga MFM coding routines are written in Z80 ASM Code.
Viele Grüße
TobiFlex

--- In minimigtg68@yahoogroups.com, "Miging" <mogli4000er@...> wrote:
>
> --- In minimigtg68@yahoogroups.com, "TobiFlex" <t.gubener@> wrote:
> >
> > Hello,
> > Now I call my Amiga core with the Minimig Chipset and the
> > TG68 "FAMPIGA". Please use the Files Version 13.
> > Please test the new Future! Now you can write into the ADF Image
files.
> > But bee carefull. This Write Function is beta and I need your
Feedback
> > for bugfixing.
> > SW[4] is the write protect switch for the Image. If SW[4] off
the
> > Image is write protect.
> >
> > Viele Grüße
> > TobiFlex
> >
>
> Hallo TobiFlex,
>
> is this also working for the real minimig? is there enough free
space
> in that PIC Chip to flash the new firmware?
> what else is to change for making ADF files writeable?
> sorry for many questions ;) i am very new in this project.
>
> thx and regards
> Sascha (german is also welcome)
>

--- In minimigtg68@yahoogroups.com, "TobiFlex" <t.gubener@...> wrote:
>
> Hello,
> Now I call my Amiga core with the Minimig Chipset and the
> TG68 "FAMPIGA". Please use the Files Version 13.
> Please test the new Future! Now you can write into the ADF Image files.
> But bee carefull. This Write Function is beta and I need your Feedback
> for bugfixing.
> SW[4] is the write protect switch for the Image. If SW[4] off the
> Image is write protect.
>
> Viele Grüße
> TobiFlex
>

Hallo TobiFlex,

is this also working for the real minimig? is there enough free space
in that PIC Chip to flash the new firmware?
what else is to change for making ADF files writeable?
sorry for many questions ;) i am very new in this project.

thx and regards
Sascha (german is also welcome)

--- In minimigtg68@yahoogroups.com, "TobiFlex" <t.gubener@...> wrote:
>
> Hello,
> Now I call my Amiga core with the Minimig Chipset and the
> TG68 "FAMPIGA". Please use the Files Version 13.
> Please test the new Future! Now you can write into the ADF Image files.
> But bee carefull. This Write Function is beta and I need your Feedback
> for bugfixing.
> SW[4] is the write protect switch for the Image. If SW[4] off the
> Image is write protect.
>
> Viele Grüße
> TobiFlex
>
Tested the write function, the image (adf) were changed and the SW 4
is not protecting against writing. Some were corrupted after a while
(using
little computer people). Using the editor program, I noticed the
keyboard interface was messed up once SW[4} was on, all kind of
characters show up in the editor (workbench).

Ok, duh.  I see it now.  It's a daughterboard plugged into the GPIO connector. 
I'm just brain
dead today.  :-)

Scott

I'd like some tips on this as well.  After looking at the schematic and photos
for the adapter
board and connector, I was wondering:  Why solder resistors and jumpers to the
DE1/DE2
board?  Or am I looking at the pictures wrong?  Couldn't those be placed on the
adapter
board?

Inquiring minds want to know!


Scott

Thanks!  I *REALLY* want to play with this!

Scott

Welcome here Scott!
I think the DE1 is fine. Here are the fitting files for DE1 and DE2:

Fitter Status : Successful - Fri Apr 18 22:05:41 2008
Quartus II Version : 7.2 Build 207 03/18/2008 SP 3 SJ Web Edition
Revision Name : minimig_de1
Top-level Entity Name : minimig_de1
Family : Cyclone II
Device : EP2C20F484C7
Timing Models : Final
Total logic elements : 11,898 / 18,752 ( 63 % )
     Total combinational functions : 10,286 / 18,752 ( 55 % )
     Dedicated logic registers : 5,445 / 18,752 ( 29 % )
Total registers : 5445
Total pins : 236 / 315 ( 75 % )
Total virtual pins : 0
Total memory bits : 179,804 / 239,616 ( 75 % )
Embedded Multiplier 9-bit elements : 4 / 52 ( 8 % )
Total PLLs : 1 / 4 ( 25 % )



Fitter Status : Successful - Fri Apr 18 21:06:17 2008
Quartus II Version : 7.2 Build 207 03/18/2008 SP 3 SJ Web Edition
Revision Name : minimig_de2
Top-level Entity Name : minimig_de2
Family : Cyclone II
Device : EP2C35F672C6
Timing Models : Final
Total logic elements : 13,157 / 33,216 ( 40 % )
     Total combinational functions : 10,863 / 33,216 ( 33 % )
     Dedicated logic registers : 6,523 / 33,216 ( 20 % )
Total registers : 6523
Total pins : 292 / 475 ( 61 % )
Total virtual pins : 75
Total memory bits : 332,380 / 483,840 ( 69 % )
Embedded Multiplier 9-bit elements : 4 / 70 ( 6 % )
Total PLLs : 1 / 4 ( 25 % )

Viele Grüße
TobiFlex

--- In minimigtg68@yahoogroups.com, "scottduensing" <scott@...>
wrote:
>
> I currently do not have a board to run this project on.  Should I
get the more expensive DE2
> or is the DE1 fine?  How much FPGA space does the current
implementation use?  I'm new to
> all this FPGA stuff, but it sure looks fun!
>
> Thanks!
>
>
> Scott
>

I currently do not have a board to run this project on.  Should I get the more
expensive DE2
or is the DE1 fine?  How much FPGA space does the current implementation use? 
I'm new to
all this FPGA stuff, but it sure looks fun!

Thanks!


Scott