requin_frederic2 wrote:

> How is it going down under ?

Well, Winter refuses to give way which is annoying, but otherwise OK!

> I plan to use it on the boot menu of the MCC board (see:
> www.arcaderetrogaming.com), on the Amiga core and as the sd-card/floppy
> controller of the C64 core. It is a lot easier to manage FAT filesystem
> with a 68000 than with a 6510 :-).

I've been meaning to make a final decision on how to implement floppy media
emulation (via FAT filesystem) on PACE projects in general. I've got the
1541 emulation for C64 and WD179X emulation for the TRS-80 (and perhaps a
few other systems) waiting for a FAT filesystem back-end. Trouble is,
there's a number of PACE targets with differing capabilities and I can't
decide how best to implement floppy support. I'm leaning towards an ARM
micro with SD via a SPI interface... though I would actually prefer the
emulation to be on-chip!

> Now, I am working on a unified cache implementation for TG68. I think I
> can get a 8KB 4-way associative cache (21.5 MHz on the CPU side, 86 MHz
> on the SDRAM side). I am wondering if I should keep the two clocks or if
> I can clock enable the TG68 with the 86 MHz. What do you think ?

I tried clock-enabling the TG68 at 12.5MHz with a 100MHz clock some time ago
without success. In theory I shouldn't have had a problem but it simply
didn't run correctly. I dropped it down to 50MHz and it seems good so far.

Regards,

--
| Mark McDougall | "Electrical Engineers do it
| <http://members.iinet.net.au/~msmcdoug> | with less resistance!"