spartan3wiz wrote:
>
> To get the TG68K working with BlockRAM should be quite easy I hope. You can,
for example,
>use the CoreGen and a COE-file to get a simple tool-chain.
I would prefer to have my own tool chain for that. There are numerous
examples on opencores,
which take the gnu elf file, and make simply an ram_image.vhdl out of
it. If one does it right,
you can use the same file on altera and xilinx.
And because of the manufacturers tools, I have a hard time to figure out
where all the connections are going. Had to install quartus to see the
connections between the modules. Would prefer plain vhdl ...

> Which board are you using? 200K/1000K Starter Kit?
I made my own, has up to 16 mbyte of sram on it.

> If you get a good working version that can execute some 68K-binary
>and output some to UART please share. That would also be nice to try.
> 68K-assembler rules!


> Actually I seem to have gotten a simple DDR-controller to work with my 1600E!
>It's not my work originally, I've just made small changes to a core
newly added to opencores.com at:
> http://opencores.org/project,sdram_controller

This one is more along my thinking.

> The core was made to work with the 500E and I managed to get i going
>with the 1600E as well. Both 8-bit and 16-bit read seem to work at
>100Mhz (and probably higher), but I reckon I need 32-bit for Minimig
>in the end. This would demand 2 16-bit read after each other at
>double the clock which is doable.

So, what keeps you from getting Minimig on this board ?
;-)

> Somebody else tried this with 500E/1600E that can feedback?

Didn't have the time yet, but this core looks very promising.

CHeers