> I have SRAM on my board at the moment, so not to eager to have the DDR
> working. I'm more interested at the moment with having a small tg68
> running on xilinx for testing. So just a XILINX ISE project which has
> the cpu in it, uses internal block ram, and probably outputs something
> on an UART. My focus is really more on the cpu part of the project.
> ('00, '20, '30 etc.)
>

To get the TG68K working with BlockRAM should be quite easy I hope. You can, for
example, use the CoreGen and a COE-file to get a simple tool-chain.

And also SRAM if you already have a nice state-machine for the memory access.
But then you would of course need to init the memory through UART or other init
procedure.

Which board are you using? 200K/1000K Starter Kit? If you get a good working
version that can execute some 68K-binary and output some to UART please share.
That would also be nice to try. 68K-assembler rules!

Actually I seem to have gotten a simple DDR-controller to work with my 1600E!
It's not my work originally, I've just made small changes to a core newly added
to opencores.com at:
http://opencores.org/project,sdram_controller

The core was made to work with the 500E and I managed to get i going with the
1600E as well. Both 8-bit and 16-bit read seem to work at 100Mhz (and probably
higher), but I reckon I need 32-bit for Minimig in the end. This would demand 2
16-bit read after each other at double the clock which is doable.

Somebody else tried this with 500E/1600E that can feedback?