Mark McDougall wrote:

Hello,

> The Minimig does the arbitration within the controller itself, but I guess
> there's no reason you couldn't do it outside the controller and leave it
> unchanged - much like the arbiters in Altera's SOPC system. Some time ago I
> wrote a simple arbiter for wishbone based on the example in the old
> wishbone documentation...

Could you sum up the requirements for the minimig SDRAM access?
(operating frequency; maximal latency: data width.. )

Sorry for noch checking the Minimig sources for myself....

j.