ninge wrote:

Hi!

>Has anyone else come across this issue before? or can anyone suggest why it
>might be happening?
>
Probably because the serial ISR gets interrupted by your 'massive'
Vcount-ISR.
To avoid this simply patch the Crt0 to not reenable the Interrupt-bit in
the CPSR when your serial interrupt occurs.
I've done that for Krawall like this (see @KRAWALL-comments):

.ifdef __MultipleInterrupts
intr_main:
@ Multiple interrupts support
mov r2, #0x4000000 @ REG_BASE
ldr r3, [r2,#0x200]! @ r2 = IE : r3 = IF|IE
ldrh r1, [r2, #0x8] @ r1 = IME
mrs r0, spsr
stmfd sp!, {r0-r2,lr} @ {spsr, IME, REG_IE, lr} // IF|IE

mov r0, #1 @ IME = 1 (To permit multiple
interrupts if
@ an interrupt occurs)
strh r0, [r2, #0x8]
and r1, r3, r3, lsr #16 @ r1 = IE & IF
mov r3, #0 @ KRAWALL
ldr r12, =IntrTable

ands r0, r1, #1 @ V-blank interrupt
bne jump_intr
add r12,r12, #4
ands r0, r1, #2 @ H-blank interrupt
bne jump_intr
add r12,r12, #4
ands r0, r1, #4 @ V-counter interrupt
bne jump_intr
add r12,r12, #4
ands r0, r1, #8 @ Timer 0 interrupt
bne jump_intr
add r12,r12, #4
ands r0, r1, #0x10 @ Timer 1 interrupt
movne r3, #1 @ KRAWALL
bne jump_intr
add r12,r12, #4
ands r0, r1, #0x20 @ Timer 2 interrupt
bne jump_intr
add r12,r12, #4
ands r0, r1, #0x40 @ Timer 3 interrupt
bne jump_intr
[...]

.ifdef __HandleCartInterrupt
strneb r0, [r2, #0x84 - 0x200] @ Stop sound if cart removed
(REG_SOUNDCNT_X)
loop: bne loop @ Infinite loop if cart removed
.endif

jump_intr:
strh r0, [r2, #2] @ Clear IF

cmp r3, #0 @ KRAWALL, should interrupts be
allowed now? (r3 == 0)
@ (NO for Timer1, kradInterrupt
must not be interrupted)

@ Enable multiple interrupts & switch to system
@ mode if __SwitchToUserStack is defined.

mrs r3, cpsr
.ifdef __SwitchToUserStack
bicne r3, r3, #0x1f @ KRAWALL: do not enable IRQ
biceq r3, r3, #0xdf @ KRAWALL: ok, enable IRQ
@ bic r3, r3, #0xdf @ \__
orr r3, r3, #0x1f @ / --> Enable IRQ & FIQ. Set
CPU mode to System.
.else
biceq r3, r3, #0xc0 @ KRAWALL: ok, enable IRQ & FIQ
@ bic r3, r3, #0xc0 @ Enable IRQ & FIQ
.endif
msr cpsr, r3

In this case Timer1-interrupts will never get interrupted by other
interrupts, this is what you probably want for the serial interrupt.

Regards,
Sebastian