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Uneven 16-bit reads from IWRAM and EWRAM   Message List  
Reply | Forward Message #11631 of 15019 |
Re: Uneven 16-bit reads from IWRAM and EWRAM

--- In gbadev@y..., James Daniels <james.daniels@a...> wrote:
> Hi all,
>
> Has anyone here timed 16-bit reads from IWRAM and EWRAM on a
> real GBA? Are reads from odd addresses just as fast as those
> from even addresses?

I interpret "even" to mean "4n" and "odd" as "4n + 2". Reads from
"odd" addresses from IWRAM should not be any different than reads
from "even" addresses because the whole 32-bit quantity gets placed
on the CPU's bus.

Let me rephrase in more precise language how I perceive your
question, according to the scientific method.

Observation: The GBA has a 16-bit bus between the memory controller
and EWRAM and a 32-bit bus between the CPU and the memory controller.
Some memory controller designers are absent-minded and make stupid
mistakes when connecting buses of differing widths.

Hypothesis: The memory controller does not perform the minimal
optimization of checking which half word the CPU wants first; thus,
a 16-bit read from *(4n + 2) inserts several additional wait states.

Alternate hypothesis: The memory controller performs the
optimization of checking which half word the CPU wants first
and fetches the correct half word from EWRAM.

Experiment: Write a subroutine in C, compiled to ARM binary with
GCC, to run from IWRAM. It should read 16-bit values from addresses
0x02001000, 0x02001002, 0x03001000, and 0x03001002 several times,
surrounded by palette modifications. Include it as part of my timing
test suite, designed to run on multiboot. Run it and look at the
height of the resulting color bars. If "odd" address reads take
longer, the corresponding color bars should be taller.

Results: The color bars for even and odd word EWRAM accesses were
equal in height, and they were appropriately taller than the
corresponding IWRAM color bars. For fun, I added in an unaligned
(odd-byte-address) EWRAM read, and its color bar was the same height.

Conclusion: The data do not match the hypothesis, but they do match
the alternate hypothesis.

Independent verification: Mail me at [tepples at spamcop dot net]
if you want a copy of the source and binaries I used.

--
Damian





Sun Jun 2, 2002 12:02 am

yerricde
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Message #11631 of 15019 |
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Hi all, Has anyone here timed 16-bit reads from IWRAM and EWRAM on a real GBA? Are reads from odd addresses just as fast as those from even addresses? -- ...
James Daniels
j_r_daniels
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Jun 1, 2002
8:26 pm

... I interpret "even" to mean "4n" and "odd" as "4n + 2". Reads from "odd" addresses from IWRAM should not be any different than reads from "even" addresses...
yerricde
Offline Send Email
Jun 2, 2002
12:15 am

Hi yerricde, ... I meant odd and even in the traditional sense - i.e. an even address is exactly divisible by 2 (2n) whereas an odd address is not (2n+1). ... ...
James Daniels
j_r_daniels
Offline Send Email
Jun 2, 2002
1:04 am

... You should, as a read from an odd (4n + c where 1 <= c <= 3) address is merely a read from 4n followed by a rotation. However, note that unlike on x86,...
yerricde
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Jun 2, 2002
10:23 am

From: "James Daniels" <james.daniels@...> ... You can only perform 8-bit reads on odd addresses. 16-bit reads must be on 16-bit boundaries....
John Seghers
johnse98072
Offline Send Email
Jun 2, 2002
10:23 am
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