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DMA dilemma!   Message List  
Reply | Forward Message #105 of 15019 |
Hi,
 
I cannot figure it out.  Does DMA transfers run asynchronously with the CPU or not?  I mean, when a DMA transfer is intiated does the CPU wait until its finished or does it not.  The fact that there are 3 priority levels of DMA seem to suggest that a DMA can interrupt another, and you need a the CPU running to start a second DMA transfer to do the interrupting.  Also, I have 4 DMA transfers on priority level 3 running back to back and they do not interfere with each other - either the CPU waits or the DMA transfer is amazingly fast.  Which is it?  Anyone??
 
Cheers!

Matt J. Davies
Programmer
Acclaim Studios Ltd.


 

 
Tue Aug 1, 2000 9:10 am

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MDavies@...
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Forward 		Message #105 of 15019 |
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Hi, I cannot figure it out. Does DMA transfers run asynchronously with the CPU or not? I mean, when a DMA transfer is intiated does the CPU wait until its ... 		Matthew Davies
MDavies@...
Send Email 		Aug 1, 2000
9:02 am

If the DMA stopped the CPU: 1) why 3 dma channels if you can use 1 a time? 2) why an interrupt to acknowledge the end of the dma? 3) what DMA itself would be...
Giovanni Bajo
bagio@...
Send Email 		Aug 1, 2000
9:08 am

... GBC halts when doing General Purpose DMA. And HBlank DMA in h-blanks. It's faster than creating a copy loop. But if you have block copy instructions.....
Rafael Vuijk
darkfader@...
Send Email 		Aug 1, 2000
9:12 am

... Not really. If you look at a standard DMA routine on GBC, it is copied to $FF00-$FFFE because that's the only area of RAM still readable (and executable)...
Giovanni Bajo
bagio@...
Send Email 		Aug 1, 2000
9:19 am

I didn't mention OAM/sprite DMA. Dark Fader...
Rafael Vuijk
darkfader@...
Send Email 		Aug 1, 2000
9:24 am

In message <17398269E24ED31180940090279C2CE9C48324@ASC-NT-EXCH1> ... Hmm, i can think of a third possibility... Maybe the CPU stops when you try to write to...
Dennis Ranke
exoticorn@...
Send Email 		Aug 1, 2000
9:26 am
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